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Scope -- Submissions -- Key Dates -- Additional Information -- Committee

Scope

VLSI Design and Test Symposium (VDAT 2015) is nineteenth in the series of symposia which started in 1997. The idea behind VDAT Symposium is to promote R&D on all aspects of VLSI to act as a forum for free discussion on emerging topics of VLSI and related fields for academicians and professionals from India and abroad. This year VDAT 2015 is being organized in technical collaboration with IEEE Computer Society and tttc (Test Technology Technical Council).

Topics of Interest:

VLSI Design: Analog and RF mixed signal design; Design and modeling of digital circuits and systems; FPGA prototyping of algorithms; Synthesis; Optoelectronic devices and circuits; MEMS, Deep Submicron and Nanometer devices and circuits; Power analysis and low-power design; Thermal analysis and temperature aware design; Physical design, packaging and board design; CAD for Design and Technology; High performance computing; System-on-chip designs; Networks-on-chip Design.
Testing and Verification: Design for testability; Test generation and fault simulation; Built-in self- test; Verification (simulation and formal); Design for manufacturability and yield analysis; Testing memories and regular logic arrays.
Embedded Systems: Hardware/software co-design and verification; Audio, Image and Video processing; Reconfigurable systems; Applications in communications, Encryption, Security, Compression, etc.; Embedded software tools; FPGA prototyping of complete systems; CAD for embedded systems.
Emerging Technology: Nanoscale computing and nanotechnology; Reversible computation; Nano- Electro-Mechanical Systems (NEMS); CAD research in the areas of emerging technology and emerging systems.

Submissions

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Researchers, Academicians and Professionals interested to present papers at the VDAT-2015 invited to submit full length paper(s) not exceeding six A4 size pages.
Soft copy of paper should be submitted in .pdf file as per the IEEE conference paper format.
There will be double blind review of the paper. So do not include authors’ name in submitted paper. Paper with authors’ names will not be processed for review. The paper must include an abstract of about 250 words and maximum of five keywords related to the topic of the paper.
Soft copies of the papers in specified format should be uploaded on the symposium web site https://www.easychair.org/conferences/?conf=vdat2015
Information about necessary revisions will be communicated to the corresponding author through e-mail. The author(s) will have to strictly incorporate the suggestions and will have to send the revised camera ready copy of the paper in the given time limit.
Authors of the accepted papers will be informed by e-mail.
Along with the paper, authors are required to submit an undertaking form which implies that, the paper has not been published previously, is not under consideration for publication elsewhere, and if accepted it will not be published elsewhere in the same form.
A poster session will also be organized. Guidelines for posters will be available on symposium website.
It is mandatory for at-least one of the authors to register in non-student category for publication of the paper.
For the author presenting more than one papers, it is mandatory to register and present each paper separately.
The paper accepted for oral presentation will be recommended to IEEE Conference Publication Program (CPP) to include it on the IEEExplore website provided all of the following conditions are fulfilled:

It strictly complies with IEEE conference paper formatting guidelines.
The paper is presented in the conference by at least one of the duly registered authors.
The duly filled and signed copy-right transfer form is submitted along with the paper.

Symposium Organizing committee has full right to reject any of the paper at any point of time.

Key Dates

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Last date of paper submission: February 28, 2015
Last date of tutorial submission: March 15, 2015
Notification of acceptance: April 15, 2015
Submission of camera ready version: April 30, 2015
Last date of fellowship application: April 30, 2015

Additional Information

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For General Information:

Usha Mehta (usha.mehta@nirmauni.ac.in, vdat2015@nirmauni.ac.in), Manoj Gaur (gaurms@mnit.com)

For publication related details:

Vijay Laxmi (vlgaur@gmail.com)

Dhaval Pujara (dhaval.pujara@nirmauni.ac.in)

Committee

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Advisory Committee:

Vishwani Agrawal, Auburn Uni. USA
S C Sahstrabuddhe, DAIICT, India
K S Dasgupta, IIST, India
Anup Singh, Nirma Uni. India
Kewal Saluja, University of Wisconsin, USA
Adit Singh, Auburn Uni. USA

General Co-Chairs

K Kotecha, Nirma Uni. India
Usha Mehta, Nirma Uni. India

Program Chairs

Manoj Gaur, MNIT, India
Usha Mehta, Nirma Uni. India

Sponsorship Chair

N M Devashrayee, Nirma Uni. India

Organizing Chairs

T H Zaveri, Nirma Uni. India
M R Naik, Nirma Uni. India

Tutorial Chairs

Chetan Parikh, Ahmedabad Uni. India
N M Desai, SAC, ISRO, Ahmedabad
Yogesh Trivedi, Nirma Uni. India

Fellowship and Student Activity Chairs

D J Shah, Shruj LED Tech., India
D K Kothari, Nirma Uni. India

Education Day Chairs

R A Thakkar, GEC, Gandhinagar, India
Joycee M Mekie, IIT Gandhinagar, India
Amisha Naik, Nirma Uni. India

Publication Chairs

Vijay Laxmi , MNIT, Jaipur
D A Pujara, Nirma Uni. India

Publicity Chairs

Virendra Singh, IIT Bombay, India
Usha Nilkanthan, GEC, Gandhinagar, India
N P Gajjar, Nirma Uni. India

Finance Chair

Manisha Upadhyay, Nirma Uni. India

Website Chair

Ankit Thakkar, Nirma Uni. India

VLSI Society of India Liaisons

Jaswinder Ahuja, Cadence, India
Sathya Sargunesan, ARM, India
Jayanta Lahiri, ARM, India

For more information, visit us on the web at: http://www.vdat2015.org

The 19th International Symposium on VLSI Design and Test is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).


CALL FOR PAPERS
Scope -- Submissions -- Key Dates -- Additional Information -- Committee
Scope
VLSI Design and Test Symposium (VDAT 2015) is nineteenth in the series of symposia which started in 1997. The idea behind VDAT Symposium is to promote R&D on all aspects of VLSI to act as a forum for free discussion on emerging topics of VLSI and related fields for academicians and professionals from India and abroad. This year VDAT 2015 is being organized in technical collaboration with IEEE Computer Society and tttc (Test Technology Technical Council). Topics of Interest: VLSI Design: Analog and RF mixed signal design; Design and modeling of digital circuits and systems; FPGA prototyping of algorithms; Synthesis; Optoelectronic devices and circuits; MEMS, Deep Submicron and Nanometer devices and circuits; Power analysis and low-power design; Thermal analysis and temperature aware design; Physical design, packaging and board design; CAD for Design and Technology; High performance computing; System-on-chip designs; Networks-on-chip Design. Testing and Verification: Design for testability; Test generation and fault simulation; Built-in self- test; Verification (simulation and formal); Design for manufacturability and yield analysis; Testing memories and regular logic arrays. Embedded Systems: Hardware/software co-design and verification; Audio, Image and Video processing; Reconfigurable systems; Applications in communications, Encryption, Security, Compression, etc.; Embedded software tools; FPGA prototyping of complete systems; CAD for embedded systems. Emerging Technology: Nanoscale computing and nanotechnology; Reversible computation; Nano- Electro-Mechanical Systems (NEMS); CAD research in the areas of emerging technology and emerging systems.
Submissions	top
Researchers, Academicians and Professionals interested to present papers at the VDAT-2015 invited to submit full length paper(s) not exceeding six A4 size pages. Soft copy of paper should be submitted in .pdf file as per the IEEE conference paper format. There will be double blind review of the paper. So do not include authors’ name in submitted paper. Paper with authors’ names will not be processed for review. The paper must include an abstract of about 250 words and maximum of five keywords related to the topic of the paper. Soft copies of the papers in specified format should be uploaded on the symposium web site https://www.easychair.org/conferences/?conf=vdat2015 Information about necessary revisions will be communicated to the corresponding author through e-mail. The author(s) will have to strictly incorporate the suggestions and will have to send the revised camera ready copy of the paper in the given time limit. Authors of the accepted papers will be informed by e-mail. Along with the paper, authors are required to submit an undertaking form which implies that, the paper has not been published previously, is not under consideration for publication elsewhere, and if accepted it will not be published elsewhere in the same form. A poster session will also be organized. Guidelines for posters will be available on symposium website. It is mandatory for at-least one of the authors to register in non-student category for publication of the paper. For the author presenting more than one papers, it is mandatory to register and present each paper separately. The paper accepted for oral presentation will be recommended to IEEE Conference Publication Program (CPP) to include it on the IEEExplore website provided all of the following conditions are fulfilled: It strictly complies with IEEE conference paper formatting guidelines. The paper is presented in the conference by at least one of the duly registered authors. The duly filled and signed copy-right transfer form is submitted along with the paper. Symposium Organizing committee has full right to reject any of the paper at any point of time.
Key Dates	top
Last date of paper submission: February 28, 2015 Last date of tutorial submission: March 15, 2015 Notification of acceptance: April 15, 2015 Submission of camera ready version: April 30, 2015 Last date of fellowship application: April 30, 2015
Additional Information	top
For General Information: Usha Mehta (usha.mehta@nirmauni.ac.in, vdat2015@nirmauni.ac.in), Manoj Gaur (gaurms@mnit.com) For publication related details: Vijay Laxmi (vlgaur@gmail.com) Dhaval Pujara (dhaval.pujara@nirmauni.ac.in)
Committee	top
Advisory Committee: Vishwani Agrawal, Auburn Uni. USA S C Sahstrabuddhe, DAIICT, India K S Dasgupta, IIST, India Anup Singh, Nirma Uni. India Kewal Saluja, University of Wisconsin, USA Adit Singh, Auburn Uni. USA General Co-Chairs K Kotecha, Nirma Uni. India Usha Mehta, Nirma Uni. India Program Chairs Manoj Gaur, MNIT, India Usha Mehta, Nirma Uni. India Sponsorship Chair N M Devashrayee, Nirma Uni. India Organizing Chairs T H Zaveri, Nirma Uni. India M R Naik, Nirma Uni. India Tutorial Chairs Chetan Parikh, Ahmedabad Uni. India N M Desai, SAC, ISRO, Ahmedabad Yogesh Trivedi, Nirma Uni. India Fellowship and Student Activity Chairs D J Shah, Shruj LED Tech., India D K Kothari, Nirma Uni. India Education Day Chairs R A Thakkar, GEC, Gandhinagar, India Joycee M Mekie, IIT Gandhinagar, India Amisha Naik, Nirma Uni. India Publication Chairs Vijay Laxmi , MNIT, Jaipur D A Pujara, Nirma Uni. India Publicity Chairs Virendra Singh, IIT Bombay, India Usha Nilkanthan, GEC, Gandhinagar, India N P Gajjar, Nirma Uni. India Finance Chair Manisha Upadhyay, Nirma Uni. India Website Chair Ankit Thakkar, Nirma Uni. India VLSI Society of India Liaisons Jaswinder Ahuja, Cadence, India Sathya Sargunesan, ARM, India Jayanta Lahiri, ARM, India
For more information, visit us on the web at: http://www.vdat2015.org
The 19th International Symposium on VLSI Design and Test is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).